...
This commit is contained in:
@@ -0,0 +1,3 @@
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OBJS-$(CONFIG_VVC_DECODER) += riscv/vvc/dsp_init.o
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RVV-OBJS-$(CONFIG_VVC_DECODER) += riscv/vvc/mc_rvv.o \
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riscv/vvc/sad_rvv.o
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@@ -0,0 +1,126 @@
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/*
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* Copyright (c) 2024 Institute of Software Chinese Academy of Sciences (ISCAS).
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*
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* This file is part of FFmpeg.
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*
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||||
* FFmpeg is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License as published by the Free Software Foundation; either
|
||||
* version 2.1 of the License, or (at your option) any later version.
|
||||
*
|
||||
* FFmpeg is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with FFmpeg; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "config.h"
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#include "libavutil/attributes.h"
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#include "libavutil/cpu.h"
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#include "libavutil/riscv/cpu.h"
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#include "libavcodec/vvc/dsp.h"
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#include "libavcodec/vvc/dec.h"
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#include "libavcodec/riscv/h26x/h2656dsp.h"
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#define bf(fn, bd, opt) fn##_##bd##_##opt
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#define AVG_PROTOTYPES(bd, opt) \
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void bf(ff_vvc_avg, bd, opt)(uint8_t *dst, ptrdiff_t dst_stride, \
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const int16_t *src0, const int16_t *src1, int width, int height); \
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void bf(ff_vvc_w_avg, bd, opt)(uint8_t *dst, ptrdiff_t dst_stride, \
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const int16_t *src0, const int16_t *src1, int width, int height, \
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int denom, int w0, int w1, int o0, int o1);
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AVG_PROTOTYPES(8, rvv_128)
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AVG_PROTOTYPES(8, rvv_256)
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#define DMVR_PROTOTYPES(bd, opt) \
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void ff_vvc_dmvr_##bd##_##opt(int16_t *dst, const uint8_t *src, ptrdiff_t src_stride, \
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int height, intptr_t mx, intptr_t my, int width); \
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void ff_vvc_dmvr_h_##bd##_##opt(int16_t *dst, const uint8_t *src, ptrdiff_t src_stride, \
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int height, intptr_t mx, intptr_t my, int width); \
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void ff_vvc_dmvr_v_##bd##_##opt(int16_t *dst, const uint8_t *src, ptrdiff_t src_stride, \
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int height, intptr_t mx, intptr_t my, int width); \
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void ff_vvc_dmvr_hv_##bd##_##opt(int16_t *dst, const uint8_t *src, ptrdiff_t src_stride, \
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int height, intptr_t mx, intptr_t my, int width); \
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DMVR_PROTOTYPES(8, rvv_128)
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DMVR_PROTOTYPES(8, rvv_256)
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#define DMVR_INIT(bd, opt) do { \
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c->inter.dmvr[0][0] = ff_vvc_dmvr_##bd##_##opt; \
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c->inter.dmvr[0][1] = ff_vvc_dmvr_h_##bd##_##opt; \
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c->inter.dmvr[1][0] = ff_vvc_dmvr_v_##bd##_##opt; \
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c->inter.dmvr[1][1] = ff_vvc_dmvr_hv_##bd##_##opt; \
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} while (0)
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int ff_vvc_sad_rvv_128(const int16_t *src0, const int16_t *src1, int dx, int dy, int block_w, int block_h);
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int ff_vvc_sad_rvv_256(const int16_t *src0, const int16_t *src1, int dx, int dy, int block_w, int block_h);
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#define PUT_PIXELS_PROTOTYPES2(bd, opt) \
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void bf(ff_vvc_put_pixels, bd, opt)(int16_t *dst, \
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const uint8_t *_src, const ptrdiff_t _src_stride, \
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const int height, const int8_t *hf, const int8_t *vf, const int width);
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PUT_PIXELS_PROTOTYPES2(8, rvv_128)
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PUT_PIXELS_PROTOTYPES2(8, rvv_256)
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#define PEL_FUNC(dst, C, idx1, idx2, a) \
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do { \
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for (int w = 1; w < 7; w++) \
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c->inter.dst[C][w][idx1][idx2] = a; \
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} while (0) \
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#define FUNCS(C, opt) \
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PEL_FUNC(put, C, 0, 0, ff_vvc_put_pixels_8_##opt); \
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void ff_vvc_dsp_init_riscv(VVCDSPContext *const c, const int bd)
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{
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#if HAVE_RVV
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const int flags = av_get_cpu_flags();
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int vlenb;
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if (!(flags & AV_CPU_FLAG_RVV_I32) || !(flags & AV_CPU_FLAG_RVB))
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return;
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vlenb = ff_get_rv_vlenb();
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if (vlenb >= 32) {
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switch (bd) {
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case 8:
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c->inter.avg = ff_vvc_avg_8_rvv_256;
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# if (__riscv_xlen == 64)
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c->inter.w_avg = ff_vvc_w_avg_8_rvv_256;
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# endif
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DMVR_INIT(8, rvv_256);
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FUNCS(LUMA, rvv_256);
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FUNCS(CHROMA, rvv_256);
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break;
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case 10:
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c->inter.sad = ff_vvc_sad_rvv_256;
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default:
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break;
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}
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} else if (vlenb >= 16) {
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switch (bd) {
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case 8:
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c->inter.avg = ff_vvc_avg_8_rvv_128;
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# if (__riscv_xlen == 64)
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c->inter.w_avg = ff_vvc_w_avg_8_rvv_128;
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# endif
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DMVR_INIT(8, rvv_128);
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FUNCS(LUMA, rvv_128);
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FUNCS(CHROMA, rvv_128);
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break;
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case 10:
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c->inter.sad = ff_vvc_sad_rvv_128;
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default:
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break;
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}
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}
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#endif
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}
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@@ -0,0 +1,305 @@
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/*
|
||||
* Copyright (c) 2024 Institute of Software Chinese Academy of Sciences (ISCAS).
|
||||
*
|
||||
* This file is part of FFmpeg.
|
||||
*
|
||||
* FFmpeg is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License as published by the Free Software Foundation; either
|
||||
* version 2.1 of the License, or (at your option) any later version.
|
||||
*
|
||||
* FFmpeg is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with FFmpeg; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
|
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*/
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#include "libavcodec/riscv/h26x/asm.S"
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.macro avg w, vlen, id
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\id\w\vlen:
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.if \w < 128
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vsetvlstatic16 \w, \vlen
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addi t0, a2, 128*2
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addi t1, a3, 128*2
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add t2, a0, a1
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vle16.v v0, (a2)
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vle16.v v8, (a3)
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addi a5, a5, -2
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vle16.v v16, (t0)
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vle16.v v24, (t1)
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||||
vadd.vv v8, v8, v0
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vadd.vv v24, v24, v16
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vmax.vx v8, v8, zero
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vmax.vx v24, v24, zero
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vsetvlstatic8 \w, \vlen
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addi a2, a2, 128*4
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vnclipu.wi v8, v8, 7
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vnclipu.wi v24, v24, 7
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addi a3, a3, 128*4
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vse8.v v8, (a0)
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vse8.v v24, (t2)
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sh1add a0, a1, a0
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.else
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addi a5, a5, -1
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mv t1, a0
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mv t2, a2
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mv t3, a3
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mv t4, a4
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1:
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vsetvli t0, a4, e16, m8, ta, ma
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sub a4, a4, t0
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vle16.v v0, (a2)
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vle16.v v8, (a3)
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vadd.vv v8, v8, v0
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vmax.vx v8, v8, zero
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vsetvli zero, zero, e8, m4, ta, ma
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vnclipu.wi v8, v8, 7
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vse8.v v8, (a0)
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sh1add a2, t0, a2
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sh1add a3, t0, a3
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add a0, a0, t0
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bnez a4, 1b
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add a0, t1, a1
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addi a2, t2, 128*2
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addi a3, t3, 128*2
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mv a4, t4
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.endif
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bnez a5, \id\w\vlen\()b
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ret
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.endm
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.macro func_avg vlen
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func ff_vvc_avg_8_rvv_\vlen\(), zve32x, zbb, zba
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lpad 0
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POW2_JMP_TABLE 1, \vlen
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csrwi vxrm, 0
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POW2_J \vlen, 1, a4
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.irp w,2,4,8,16,32,64,128
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avg \w, \vlen, 1
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.endr
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endfunc
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.endm
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func_avg 128
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func_avg 256
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#if (__riscv_xlen == 64)
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.macro w_avg w, vlen, id
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\id\w\vlen:
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.if \w <= 32 || (\w == 64 && \vlen == 256)
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vsetvlstatic16 \w, \vlen
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addi t0, a2, 128*2
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addi t1, a3, 128*2
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vle16.v v0, (a2)
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vle16.v v4, (a3)
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||||
addi a5, a5, -2
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||||
vle16.v v8, (t0)
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||||
vle16.v v12, (t1)
|
||||
vwmul.vx v16, v0, a7
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||||
vwmul.vx v24, v8, a7
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||||
vwmacc.vx v16, t3, v4
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||||
vwmacc.vx v24, t3, v12
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||||
vsetvlstatic32 \w, \vlen
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add t2, a0, a1
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||||
vadd.vx v16, v16, t4
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vadd.vx v24, v24, t4
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||||
vsetvlstatic16 \w, \vlen
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||||
vnsrl.wx v16, v16, t6
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||||
vnsrl.wx v24, v24, t6
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||||
vmax.vx v16, v16, zero
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||||
vmax.vx v24, v24, zero
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||||
vsetvlstatic8 \w, \vlen
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||||
addi a2, a2, 128*4
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||||
vnclipu.wi v16, v16, 0
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||||
vnclipu.wi v24, v24, 0
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||||
vse8.v v16, (a0)
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||||
addi a3, a3, 128*4
|
||||
vse8.v v24, (t2)
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||||
sh1add a0, a1, a0
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||||
.else
|
||||
addi a5, a5, -1
|
||||
mv t1, a0
|
||||
mv t2, a2
|
||||
mv t5, a3
|
||||
mv a6, a4
|
||||
1:
|
||||
vsetvli t0, a4, e16, m4, ta, ma
|
||||
sub a4, a4, t0
|
||||
vle16.v v0, (a2)
|
||||
vle16.v v4, (a3)
|
||||
vwmul.vx v16, v0, a7
|
||||
vwmacc.vx v16, t3, v4
|
||||
vsetvli zero, zero, e32, m8, ta, ma
|
||||
vadd.vx v16, v16, t4
|
||||
vsetvli zero, zero, e16, m4, ta, ma
|
||||
vnsrl.wx v16, v16, t6
|
||||
vmax.vx v16, v16, zero
|
||||
vsetvli zero, zero, e8, m2, ta, ma
|
||||
vnclipu.wi v16, v16, 0
|
||||
vse8.v v16, (a0)
|
||||
sh1add a2, t0, a2
|
||||
sh1add a3, t0, a3
|
||||
add a0, a0, t0
|
||||
bnez a4, 1b
|
||||
add a0, t1, a1
|
||||
addi a2, t2, 128*2
|
||||
addi a3, t5, 128*2
|
||||
mv a4, a6
|
||||
.endif
|
||||
bnez a5, \id\w\vlen\()b
|
||||
ret
|
||||
.endm
|
||||
|
||||
.macro func_w_avg vlen
|
||||
func ff_vvc_w_avg_8_rvv_\vlen\(), zve32x, zbb, zba
|
||||
lpad 0
|
||||
POW2_JMP_TABLE 2, \vlen
|
||||
csrwi vxrm, 0
|
||||
addi t6, a6, 7
|
||||
ld t3, (sp)
|
||||
ld t4, 8(sp)
|
||||
ld t5, 16(sp)
|
||||
addi t4, t4, 1 // o0 + o1 + 1
|
||||
add t4, t4, t5
|
||||
addi t5, t6, -1 // shift - 1
|
||||
sll t4, t4, t5
|
||||
POW2_J \vlen, 2, a4
|
||||
.irp w,2,4,8,16,32,64,128
|
||||
w_avg \w, \vlen, 2
|
||||
.endr
|
||||
endfunc
|
||||
.endm
|
||||
|
||||
func_w_avg 128
|
||||
func_w_avg 256
|
||||
#endif
|
||||
|
||||
func dmvr zve32x, zbb, zba
|
||||
lpad 0
|
||||
li t0, 4
|
||||
1:
|
||||
add t1, a1, a2
|
||||
addi t4, a0, 128*2
|
||||
vle8.v v0, (a1)
|
||||
vle8.v v4, (t1)
|
||||
addi a3, a3, -2
|
||||
vwmulu.vx v16, v0, t0
|
||||
vwmulu.vx v20, v4, t0
|
||||
vse16.v v16, (a0)
|
||||
vse16.v v20, (t4)
|
||||
sh1add a1, a2, a1
|
||||
add a0, a0, 128*2*2
|
||||
bnez a3, 1b
|
||||
ret
|
||||
endfunc
|
||||
|
||||
.macro dmvr_h_v mn, type, w, vlen
|
||||
func dmvr_\type\vlen\w, zve32x, zbb, zba
|
||||
lla t4, ff_vvc_inter_luma_dmvr_filters
|
||||
sh1add t4, \mn, t4
|
||||
lbu t5, (t4)
|
||||
lbu t6, 1(t4)
|
||||
1:
|
||||
vsetvlstatic8 \w, \vlen
|
||||
.ifc \type,h
|
||||
addi t0, a1, 1
|
||||
addi t1, a1, 2
|
||||
.else
|
||||
add t0, a1, a2
|
||||
add t1, t0, a2
|
||||
.endif
|
||||
vle8.v v0, (a1)
|
||||
vle8.v v4, (t0)
|
||||
vle8.v v8, (t1)
|
||||
addi a3, a3, -2
|
||||
addi t2, a0, 128*2
|
||||
vwmulu.vx v12, v0, t5
|
||||
vwmulu.vx v24, v4, t5
|
||||
vwmaccu.vx v12, t6, v4
|
||||
vwmaccu.vx v24, t6, v8
|
||||
vsetvlstatic16 \w, \vlen
|
||||
vssrl.vi v12, v12, 2
|
||||
vssrl.vi v24, v24, 2
|
||||
vse16.v v12, (a0)
|
||||
vse16.v v24, (t2)
|
||||
add a0, a0, 128*4
|
||||
sh1add a1, a2, a1
|
||||
bnez a3, 1b
|
||||
ret
|
||||
endfunc
|
||||
.endm
|
||||
|
||||
.macro dmvr_load_h dst, filter0, filter1, w, vlen
|
||||
vsetvlstatic8 \w, \vlen
|
||||
addi a6, a1, 1
|
||||
vle8.v \dst, (a1)
|
||||
vle8.v v2, (a6)
|
||||
vwmulu.vx v4, \dst, \filter0
|
||||
vwmaccu.vx v4, \filter1, v2
|
||||
vsetvlstatic16 \w, \vlen
|
||||
vssrl.vi \dst, v4, 2
|
||||
.endm
|
||||
|
||||
.macro dmvr_hv w, vlen
|
||||
func dmvr_hv\vlen\w, zve32x, zbb, zba
|
||||
lla t0, ff_vvc_inter_luma_dmvr_filters
|
||||
sh1add t1, a4, t0
|
||||
sh1add t2, a5, t0
|
||||
lbu t3, (t1) // filter[mx][0]
|
||||
lbu t4, 1(t1) // filter[mx][1]
|
||||
lbu t5, (t2) // filter[my][0]
|
||||
lbu t6, 1(t2) // filter[my][1]
|
||||
dmvr_load_h v12, t3, t4, \w, \vlen
|
||||
add a1, a1, a2
|
||||
1:
|
||||
vmul.vx v28, v12, t5
|
||||
addi a3, a3, -1
|
||||
dmvr_load_h v12, t3, t4, \w, \vlen
|
||||
vmacc.vx v28, t6, v12
|
||||
vssrl.vi v28, v28, 4
|
||||
vse16.v v28, (a0)
|
||||
add a1, a1, a2
|
||||
addi a0, a0, 128*2
|
||||
bnez a3, 1b
|
||||
ret
|
||||
endfunc
|
||||
.endm
|
||||
|
||||
.macro func_dmvr vlen, name
|
||||
func ff_vvc_\name\()_8_rvv_\vlen\(), zve32x, zbb, zba
|
||||
lpad 0
|
||||
li t0, 20
|
||||
beq a6, t0, DMVR\name\vlen\()20
|
||||
.irp w,12,20
|
||||
DMVR\name\vlen\w:
|
||||
.ifc \name, dmvr
|
||||
vsetvlstatic8 \w, \vlen
|
||||
j \name
|
||||
.else
|
||||
csrwi vxrm, 0
|
||||
j \name\()\vlen\w
|
||||
.endif
|
||||
.endr
|
||||
endfunc
|
||||
.endm
|
||||
|
||||
|
||||
.irp vlen,256,128
|
||||
.irp w,12,20
|
||||
dmvr_h_v a4, h, \w, \vlen
|
||||
dmvr_h_v a5, v, \w, \vlen
|
||||
dmvr_hv \w, \vlen
|
||||
.endr
|
||||
func_dmvr \vlen, dmvr
|
||||
func_dmvr \vlen, dmvr_h
|
||||
func_dmvr \vlen, dmvr_v
|
||||
func_dmvr \vlen, dmvr_hv
|
||||
.endr
|
||||
|
||||
func_put_pixels 256, 128, vvc
|
||||
func_put_pixels 128, 128, vvc
|
||||
@@ -0,0 +1,61 @@
|
||||
/*
|
||||
* Copyright (c) 2024 Institute of Software Chinese Academy of Sciences (ISCAS).
|
||||
*
|
||||
* This file is part of FFmpeg.
|
||||
*
|
||||
* FFmpeg is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License as published by the Free Software Foundation; either
|
||||
* version 2.1 of the License, or (at your option) any later version.
|
||||
*
|
||||
* FFmpeg is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with FFmpeg; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#include "libavcodec/riscv/h26x/asm.S"
|
||||
|
||||
.macro func_sad vlen
|
||||
func ff_vvc_sad_rvv_\vlen, zve32x, zbb, zba
|
||||
lpad 0
|
||||
slli t2, a3, 7 // dy * 128
|
||||
li t1, 4*128+4
|
||||
add t3, t2, a2 // dy * 128 + dx
|
||||
sub t1, t1, t2
|
||||
sub t1, t1, a2
|
||||
sh1add a0, t3, a0
|
||||
sh1add a1, t1, a1
|
||||
li t3, 16
|
||||
beq a4, t3, SADVSET\vlen\()16
|
||||
.irp w,8,16
|
||||
SADVSET\vlen\w:
|
||||
vsetvlstatic32 \w, \vlen
|
||||
vmv.v.i v0, 0
|
||||
vmv.s.x v24, zero
|
||||
vsetvlstatic16 \w, \vlen, tu
|
||||
SAD\vlen\w:
|
||||
addi a5, a5, -2
|
||||
vle16.v v8, (a0)
|
||||
vle16.v v16, (a1)
|
||||
vsub.vv v8, v8, v16
|
||||
vneg.v v16, v8
|
||||
addi a0, a0, 2 * 128 * 2
|
||||
vmax.vv v8, v8, v16
|
||||
vwaddu.wv v0, v0, v8
|
||||
addi a1, a1, 2 * 128 * 2
|
||||
bnez a5, SAD\vlen\w
|
||||
vsetvlstatic32 \w, \vlen
|
||||
vredsum.vs v24, v0, v24
|
||||
vmv.x.s a0, v24
|
||||
ret
|
||||
.endr
|
||||
endfunc
|
||||
.endm
|
||||
|
||||
func_sad 256
|
||||
func_sad 128
|
||||
Reference in New Issue
Block a user